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Find more Infant Development topics like this in our Templates & Designs.. Celebrating 1 year of free blogging with Free Blog Hosting.1. Field of the Invention
This invention is related to a method for manufacturing a semiconductor device using a laser beam, and more particularly to a method for manufacturing a semiconductor device having a circuit pattern which includes wiring pattern and via pattern in which the wiring pattern is formed between the via holes, wherein the method utilizes a laser beam to reduce the number of processes for forming the wiring pattern.
2. Description of the Related Art
Recently, various kinds of highly reliable semiconductor devices have been increasingly developed in which the design rule is miniaturized. In such semiconductor devices, a circuit pattern for each unit element is formed in a wide area. Thereby, the wiring length is increased. This causes an increase in both wiring delay and wiring capacitance, and thus the operation frequency of the semiconductor devices is decreased and so on. In order to decrease the wiring length, the interconnection wiring of the semiconductor devices is formed to have a multi-level structure in which the via holes penetrating through the interlayer insulating film between the upper and lower layers are formed at predetermined positions. As the interconnection wiring of the multi-level structure can be electrically isolated by the interlayer insulating film, a conductive material can be formed only in the wiring pattern such as the via holes, and thereby the width of the wiring pattern can be reduced. This brings about a reduction in the wiring capacitance and an increase in the operation frequency.
In general, there are two kinds of methods for forming such a multi-level interconnection structure as mentioned above. One method is a damascene method in which the via holes are first formed in an interlayer insulating film, and then the conductive material is filled into the via holes and wiring pattern such as a wiring layer is formed by way of the conductive material. The other method is a dual damascene method in which the via holes are first formed in an interlayer insulating film, and then the wiring pattern such as a wiring layer is formed by way of a conductive material.
In these methods, generally, a photoresist pattern having an opening portion therein is formed in accordance with the pattern of the desired interconnection structure (see FIG. 1A). Subsequently, etching or polishing is performed on an exposed portion of the interlayer insulating film to remove the exposed portion,
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